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Deep Submicron Design Support Service

Deep sub micron design is full of pitfalls that can cause failure of your circuits: clock-skew and latency of interacting clocks, IR-drop on the power mesh, electro-migration problems, the growing importance of interconnect delays, crosstalk, on-chip variation, many metal interconnect layers...
IMEC's Design Support Service can help you achieve a first time right ASIC.

Features and Benefits

Many circuits have been taped out, for 2 to 9 metal-layer processes, for in-house developed SoC's as well as for ASICS developed by third-party design houses, companies, research institutes and universities. Many of these systems held analog full-custom blocks, combined with other macro's (e.g. several kinds of RAM or ROM, PLL's, analog full-custom blocks …) and standard-cells. Circuit complexities of up to 71 million transistors were handled.


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