| Process | IP Name | IP | Description |
| 65nm | TCBN65LP | Standard cell | TSMC 65nm Logic Low-Power 1.2V/2.5V process, 0.20um x-pitch, Standard Vt, 9-track, Raw gate density = 854 Kgate/mm^2, Support multi-Vdd design , low-voltage range is 1.0V +/- 10%, CCS timing/noise/power model is included |
| TCBN65LPHVT | Standard cell | TSMC 65nm Logic Low-Power 1.2V/2.5V process, 0.20um x-pitch, High Vt, 9-track, Raw gate density = 854 Kgate/mm^2, Support multi-Vdd design , low-voltage range is 1.0V +/- 10%, CCS timing/noise/power model is included | |
| TCBN65LPLVT | Standard cell | TSMC 65nm Logic Low-Power 1.2V/2.5V process, 0.20um x-pitch, Low Vt, 9-track, Raw gate density = 854 Kgate/mm^2, Support multi-Vdd design , low-voltage range is 1.0V +/- 10%, CCS timing/noise/power model is included | |
| TCBN65LPCG | Standard cell | TSMC 65nm low-power process (1P9M, core 1.2V), 9-Track, Coarse-grain MTCMOS library, Standard-Vt , Include special cell for 1) retention flip-flop cell, 2) always on cell | |
| TCBN65LPCGHVT | Standard cell | TSMC 65nm Low-power process (1P9M, core 1.2V), 9-Track, Coarse-grain MTCMOS library, High-Vt , Include special cell for 1) power switch header/footer cell, 2) retention flip-flop cell, 3) always on cell | |
| TCBN65LPCGLVT | Standard cell | TSMC 65nm Low-power process (1P9M, core 1.2V), 9-Track, Coarse-grain MTCMOS library, Low-Vt , Include special cell for 1) retention flip-flop cell, 2) always on cell | |
| TPAN65LPNV2 | Analog standard I/O | 1.2V/2.5V Universal Analog I/O compatible with Linear Universal Standard I/O | |
| TPBN65V | Standard I/O | bond pad library | |
| TPDN65LPNV2 | Digital standard I/O | 1.2/2.5V, Regular, Linear Universal Standard I/O | |
Process | IP Name | IP | Description |
| 90nm LP | TCBN90LPHDBWP | Standard Cell | tap-less (taps tied to VDD/VSS), 7-track (HD) characterized for 1.0V |
| TCBN90LPHDBWPHVT | Standard Cell | tap-less (taps tied to VDD/VSS), High Vt, 7-track (HD) characterized for 1.0V | |
| TCBN90LPHDBWPLVT | Standard Cell | tap-less (taps tied to VDD/VSS), Low Vt, 7-track (HD) characterized for 1.0V | |
| TCBN90LPHDWPULVT | Standard Cell | tap-less (taps tied to VDD/VSS), Ultra low Vt | |
| TCBN90LPHP | Standard Cell | nom. Vt, 9-track (HP) | |
| TCBN90LPHPLVT | Standard Cell | Low Vt, 9-track (HP), | |
| TCBN90LPHPHVT | Standard Cell | High Vt, 9-track (HP), | |
| TCBN90LPHPCG | Standard Cell | nom. Vt, 9-track (HP), coarse grain | |
| TCBN90LPHPLVTCG | Standard Cell | Low Vt, 9-track (HP), coarse grain | |
| TCBN90LPHPHVTCG | Standard Cell | High Vt, 9-track (HP), coarse grain | |
| TCBN90LPHPWB | Standard Cell | tap-less (well-bias), nom. Vt, 9-track (HP), | |
| TCBN90LPHPLVTWB | Standard Cell | tap-less (well-bias), Low Vt, 9-track (HP) | |
| TCBN90LPHPHVTWB | Standard Cell | tap-less (well-bias), High Vt, 9-track (HP) | |
| TCBN90LPHPHVTCG | Standard Cell | tap-less (well-bias), High Vt, 9-track (HP) | |
| TCBN90LPHPUD | Standard Cell | nom. Vt, 9-track (HP), Under-drive to 1.0V | |
| TCBN90LPHPUDLVT | Standard Cell | Low Vt, 9-track (HP), Under-drive to 1.0V | |
| TCBN90LPHPUDHVT | Standard Cell | High Vt, 9-track (HP), Under-drive to 1.0V | |
| TCBN90LPHPULVT | Standard Cell | ultra low Vt, 9-track (HP) supports multi-vdd design | |
| TPAN90LPNV2 | Analog standard I/O | 1.2V/2.5V | |
| TPAN90LPNV3 | Analog standard I/O | 1.2V/3.3V | |
| TPDN90LPNV2 | Digital standard I/O | 1.2V/2.5V | |
| TPDN90LPNV3 | Digital standard I/O | 1.2V/3.3V | |
| TPBN90V | Standard I/O | Standard I/O Bond pad library | |
Process | IP Name | IP | Description |
| 90nm G | TCBN90GHP | Standard Cell | nom. Vt, 9-track (HP), supports multi-Vdd design |
| TCBN90GHPCG | Standard Cell | nom. Vt, 9-track (HP), coarse grain | |
| TCBN90GHPCGHVT | Standard Cell | High Vt, 9-track (HP), coarse grain | |
| TCBN90GHPCGLVT | Standard Cell | Low Vt, 9-track (HP), coarse grain | |
| TCBN90GHPHVT | Standard Cell | High Vt, 9-track (HP), supports multi-Vdd design | |
| TCBN90GHPLVT | Standard Cell | Low Vt, 9-track (HP), supports multi-Vdd design | |
| TPAN90GV2 | Analog standard I/O | 1.0V/2.5V | |
| TPBN90GV | Standard I/O | Standard I/O Bond pad library | |
| TPIN90GV | Standard I/O | Adapter cell library to bridge between staggered universal I/O and staggered non-universal I/O | |
| TPIN90NV | Standard I/O | Adapter cell library to bridge between staggered universal I/O and staggered non-universal I/O | |
| TPZN90GV18 | Digital standard I/O | High voltage tolerant, 1.0/1.8V, 2.5V staggered I/O | |
| TPZN90GV2 | Digital standard I/O | High voltage tolerant 1.0/2.5V, 3.3V staggered I/O | |
| TPZN90GV3 | Digital standard I/O | High voltage tolerant 1.0V/3.3V, 5V staggered I/O | |
Process | IP Name | IP | Description |
| 130nm G | TPD013NV3 | Standard I/O | 0.13um Logic 1.2V/3.3V, Regular, Linear Universal Standard I/O v.220d |
| TPD013NV2 | Standard I/O | 0.13um Logic 1.2V/2.5V, Regular, Linear Universal Standard I/O v.220b | |
| TPB013GV | Standard I/O | 0.13um Logic Staggered Bond pad library v.130b | |
| TPB013NV | Standard I/O | 0.13um Logic Linear Bond pad library v.130a | |
| TPZ013G2 | Standard I/O | 0.13um Logic 1.2V/2.5V, 3.3V tolerant, staggered universal standard I/O v.210c | |
| TPZ013G3 | Standard I/O | 0.13um Logic 1.2V/3.3V, 5V tolerant, staggered universal standard I/O v.210c | |
| STDCEL_CL013G | Standard Cell | 0.13um Logic Process 1.2-Volt SAGE-XTM v2.0 Standard Cell Library | |
Process | IP Name | IP | Description |
| 180nm | TPD018NV | Standard I/O | 0.18um Logic 1.8V/3.3V, regular, linear universal standard I/O library |
| TPZ018NV | Standard I/O | 0.18um Logic 1.8V/3.3V, 5V Tolerant, Linear Universal Standard I/O library | |
| TPB018NV | Standard I/O | 0.18um Logic Bond pad library v.140b | |
| STDCEL_CL018G | Standard Cell | 0.18um Process 1.8-Volt SAGE-XTM Standard Cell Library 2004q3v1 | |
Process | IP Name | IP | Description |
| 250nm | STDCEL_CL025G | Standard Cell | 0.25um Process 2.5-Volt SAGE-XTM Standard Cell Library 2004q2v1 |
| TPZ873GEZ | Standard I/O | 0.25um Logic 2.5/3.3/5V Tolerant Staggered I/O library v.230b | |
| TPZ873NEZ | Standard I/O | 0.25um Logic 2.5/3.3/5V Tolerant Linear I/O library v.230c |